 English |
|
|
|
|
|
|
|
| SH7263 Datasheet, PDF (1306/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series | |||
| |||
| ◁ |
Section 25 USB 2.0 Host/Function Module (USB)
25.3.18 BRDY Interrupt Status Register (BRDYSTS)
BRDYSTS is a register that is used to confirm the BRDY interrupt status for each pipe.
This register is initialized by a power-on reset or a software reset.
Bit: 15 14 13 12 11 10 9
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
8
7
6
5
4
3
2
1
0
-
PIPE7 PIPE6 PIPE5 PIPE4 PIPE3 PIPE2 PIPE1 PIPE0
BRDY BRDY BRDY BRDY BRDY BRDY BRDY BRDY
0
0
0
0
0
0
0
0
0
R R/W*1 R/W*1 R/W*1 R/W*1 R/W*1 R/W*1 R/W*1 R/W*1
Bit
Bit Name
15 to 8 â¯
Initial
Value
All 0
7
PIPE7BRDY 0
6
PIPE6BRDY 0
5
PIPE5BRDY 0
4
PIPE4BRDY 0
3
PIPE3BRDY 0
2
PIPE2BRDY 0
R/W Description
R
Reserved
R/W*1
These bits are always read as 0. The write value
should always be 0.
BRDY Interrupt Status for PIPE7*2
0: Interrupts not generated
1: Interrupts generated
R/W*1 BRDY Interrupt Status for PIPE6*2
0: Interrupts not generated
1: Interrupts generated
R/W*1 BRDY Interrupt Status for PIPE5*2
0: Interrupts not generated
1: Interrupts generated
R/W*1 BRDY Interrupt Status for PIPE4*2
0: Interrupts not generated
1: Interrupts generated
R/W*1 BRDY Interrupt Status for PIPE3*2
0: Interrupts not generated
1: Interrupts generated
R/W*1 BRDY Interrupt Status for PIPE2*2
0: Interrupts not generated
1: Interrupts generated
Rev. 2.00 Mar. 14, 2008 Page 1272 of 1824
REJ09B0290-0200
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese