SH7263 Datasheet, PDF (1267/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 USB 2.0 Host/Function Module (USB)
25.3 Register Description
Table 25.2 shows the register configuration of the USB.
Table 25.2 Register Configuration
Register Name
Abbreviation R/W
System configuration control SYSCFG
R/W
register
System configuration status SYSSTS
R
register
Device state control register DVSTCTR R/W
Test mode register
TESTMODE R/W
CPU-FIFO bus configuration CFBCFG
R/W
register
DMA0-FIFO bus configuration D0FBCFG R/W
register
DMA1-FIFO bus configuration D1FBCFG R/W
register
CFIFO port register
CFIFO
R/W
D0FIFO port register
D0FIFO
R/W
D1FIFO port register
D1FIFO
R/W
CFIFO port select register
CFIFOSEL R/W
CFIFO port control register
CFIFOCTR R/W
CFIFO port SIE register
CFIFOSIE
R/W
D0FIFO port select register D0FIFOSEL R/W
D0FIFO port control register D0FIFOCTR R/W
D0 transaction counter register D0FIFOTRN R/W
D1FIFO port select register D1FIFOSEL R/W
D1FIFO port control register D1FIFOCTR R/W
D1 transaction counter register D1FIFOTRN R/W
Interrupt enable register 0
INTENB0
R/W
Interrupt enable register 1
INTENB1
R/W
BRDY interrupt enable register BRDYENB R/W
NRDY interrupt enable register NRDYENB R/W
Initial Value Address
Access
Size
H'0000
H'FFFC 1C00 16
H'040x
H'FFFC 1C02 16
H'0000
H'0100
H'000F
H'FFFC 1C04 16
H'FFFC 1C06 16
H'FFFC 1C0A 16
H'000F
H'FFFC 1C0C 16
H'000F
H'FFFC 1C0E 16
H'00000000
H'00000000
H'00000000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'FFFC 1C10 8, 16, 32
H'FFFC 1C14 8, 16, 32
H'FFFC 1C18 8, 16, 32
H'FFFC 1C1E 16
H'FFFC 1C20 16
H'FFFC 1C22 16
H'FFFC 1C24 16
H'FFFC 1C26 16
H'FFFC 1C28 16
H'FFFC 1C2A 16
H'FFFC 1C2C 16
H'FFFC 1C2E 16
H'FFFC 1C30 16
H'FFFC 1C32 16
H'FFFC 1C36 16
H'FFFC 1C38 16
Rev. 2.00 Mar. 14, 2008 Page 1233 of 1824
REJ09B0290-0200