SH7263 Datasheet, PDF (962/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 19 Controller Area Network (RCAN-TL1)
Offset
6'b000000
6'b000001
6'b000010
6'b000011
6'b000100
…
…
6'b111110
6'b111111
Description
Initial Offset = 1^st Basic Cycle (initial value)
Initial Offset = 2^nd Basic Cycles
Initial Offset = 3^rd Basic Cycles
Initial Offset = 4^th Basic Cycles
Initial Offset = 5^th Basic Cycles
Initial Offset = 63^rd Basic Cycles
Initial Offset = 64^th Basic Cycles
The following relation must be maintained:
Cycle_Count_Maximum + 1 >= Repeat_Factor > Offset
Cycle_Count_Maximum = 2^CMAX - 1
Repeat_Factor = 2^rep_factor
Rev. 2.00 Mar. 14, 2008 Page 928 of 1824
REJ09B0290-0200