SH7263 Datasheet, PDF (148/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 4 Clock Pulse Generator (CPG)
4.5.3 Note on Using a PLL Oscillation Circuit
In the PLLVcc and PLLVss connection pattern for the PLL, signal lines from the board power
supply pins must be as short as possible and pattern width must be as wide as possible to reduce
inductive interference.
Since the analog power supply pins of the PLL are sensitive to the noise, the system may
malfunction due to inductive interference at the other power supply pins. To prevent such
malfunction, the analog power supply pin Vcc and digital power supply pin PVcc should not
supply the same resources on the board if at all possible.
Signal lines prohibited
PLLVcc
Power supply
Vcc
PLLVss
Vss
Figure 4.2 Note on Using a PLL Oscillation Circuit
Rev. 2.00 Mar. 14, 2008 Page 114 of 1824
REJ09B0290-0200