SH7263 Datasheet, PDF (1416/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 26 LCD Controller (LCDC)
26.3.9 Palette Data Registers 00 to FF (LDPR00 to LDPRFF)
LDPR registers are for accessing palette data directly allocated (4 bytes × 256 addresses) to the
memory space. To access the palette memory, access the corresponding register among this
register group (LDPR00 to LDPRFF). Each palette register is a 32-bit register including three 8-bit
areas for R, G, and B. For details on the color palette specifications, see section 26.4.3, Color
Palette Specification.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn
23
22
21
20
19
18
17
16
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W: R
R
R
R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn PALDnn
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W
31 to 24 ⎯
⎯
R
23 to 0 PALDnn23 ⎯
R/W
to PALDnn0
Note: nn = H'00 to H'FF
Description
Reserved
Palette Data
Bits 18 to 16, 9, 8, and 2 to 0 are reserved within each
RGB palette and cannot be set. However, these bits
can be extended according to the upper bits.
Rev. 2.00 Mar. 14, 2008 Page 1382 of 1824
REJ09B0290-0200