SH7263 Datasheet, PDF (484/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Channel Register Name
Abbrevia-
tion
Common Timer output master enable
to 3 and register
4
Timer output control register 1
TOER
TOCR1
Timer output control register 2 TOCR2
Timer gate control register
TGCR
Timer cycle control register TCDR
Timer dead time data register TDDR
Timer subcounter
TCNTS
Timer cycle buffer register
TCBR
Timer interrupt skipping set
register
TITCR
Timer interrupt skipping counter TITCNT
Timer buffer transfer set
register
TBTER
Timer dead time enable
register
TDER
Timer waveform control register TWCR
Timer output level buffer
register
TOLBR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R
R/W
R/W
R/W
R/W
Initial
value
H'C0
Address
Access
Size
H'FFFE420A 8
H'00 H'FFFE420E 8
H'00 H'FFFE420F 8
H80 H'FFFE420D 8
H'FFFF H'FFFE4214 16
H'FFFF H'FFFE4216 16
H'0000 H'FFFE4220 16
H'FFFF H'FFFE4222 16
H'00 H'FFFE4230 8
H'00
H'00
H'FFFE4231 8
H'FFFE4232 8
H'01 H'FFFE4234 8
H'00
H'00
H'FFFE4260 8
H'FFFE4236 8
Rev. 2.00 Mar. 14, 2008 Page 450 of 1824
REJ09B0290-0200