SH7263 Datasheet, PDF (1314/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 USB 2.0 Host/Function Module (USB)
Table 25.9 Error Information When NRDY Interrupt is Generated in Isochronous IN
Transfer
Bit Status
OVRN = 1
CRCE = 1
Issued When
IN-token is
received
Not generated
Issue Conditions
An IN-token is received
before writing to buffer
memory is completed.
⎯
Detected Error
Transmit data
buffer underrun
⎯
Operation
Zero-length
packet is
transmitted
⎯
25.3.22 μFrame Number Register (UFRMNUM)
UFRMNUM is a register that indicates the μframe number.
This register is initialized by a power-on reset or a software reset.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
UFRNM[2:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Initial
Bit
Bit Name
Value R/W Description
15 to 3 ⎯
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
2 to 0 UFRNM[2:0] 000
R
μFrame
The μframe number can be confirmed.
These bits are incremented when a μSOF packet is
received.
During full-speed operation, these bits are always
read as B'000.
Rev. 2.00 Mar. 14, 2008 Page 1280 of 1824
REJ09B0290-0200