SH7263 Datasheet, PDF (916/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 18 Serial Sound Interface (SSI)
Initial
Bit
Bit Name Value R/W Description
1
SWNO
1
R
System Word Number
This status bit indicates the current word number.
• TRMD = 0 (Receive mode)
SWNO indicates which system word the data in
SSIRDR currently represents. This value will
change as the data in SSIRDR is updated from the
shift register, regardless of whether SSIRDR has
been read.
• TRMD = 1 (Transmit mode)
SWNO indicates which system word is required to
be written to SSITDR. This value will change as the
data is copied to the shift register, regardless of
whether the data is written to SSITDR.
0
IDST
1
R
Idle Mode Status Flag
This status flag indicates that the serial bus activity has
stopped.
This bit is cleared if EN = 1 and the serial bus are
currently active.
This bit is automatically set to 1 under the following
conditions.
• SSI = Master transmitter (SWSD = 1 and
TRMD = 1)
This bit is set to 1 if the EN bit is cleared and the
data written to SSITDR has been completely output
from the serial data input/output pin (SSIDATA)
(that is, output of the system word is completed).
• SSI = Master receiver (SWSD = 1 and TRMD = 0)
This bit is set to 1 if the EN bit is cleared and the
current system word is completed.
• SSI = Slave transmitter/receiver (SWSD = 0)
This bit is set to 1 if the EN bit is cleared and the
current system word is completed.
Note: If the external master stops the serial bus clock
before the current system word is completed,
this bit is not set.
Note: * The bit can be read or written to. Writing 0 initializes the bit, but writing 1 is ignored.
Rev. 2.00 Mar. 14, 2008 Page 882 of 1824
REJ09B0290-0200