SH7263 Datasheet, PDF (16/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

11.4.9 A/D Converter Start Request Delaying Function.................................................. 586
11.4.10 TCNT Capture at Crest and/or Trough in Complementary PWM Operation ....... 590
11.5 Interrupt Sources................................................................................................................ 591
11.5.1 Interrupt Sources and Priorities ............................................................................ 591
11.5.2 DMAC Activation ................................................................................................ 593
11.5.3 A/D Converter Activation..................................................................................... 593
11.6 Operation Timing............................................................................................................... 595
11.6.1 Input/Output Timing............................................................................................. 595
11.6.2 Interrupt Signal Timing ........................................................................................ 602
11.7 Usage Notes ....................................................................................................................... 606
11.7.1 Module Standby Mode Setting ............................................................................. 606
11.7.2 Input Clock Restrictions ....................................................................................... 606
11.7.3 Caution on Period Setting ..................................................................................... 607
11.7.4 Contention between TCNT Write and Clear Operations...................................... 607
11.7.5 Contention between TCNT Write and Increment Operations............................... 608
11.7.6 Contention between TGR Write and Compare Match.......................................... 609
11.7.7 Contention between Buffer Register Write and Compare Match ......................... 610
11.7.8 Contention between Buffer Register Write and TCNT Clear ............................... 611
11.7.9 Contention between TGR Read and Input Capture............................................... 612
11.7.10 Contention between TGR Write and Input Capture.............................................. 613
11.7.11 Contention between Buffer Register Write and Input Capture ............................. 614
11.7.12 TCNT2 Write and Overflow/Underflow Contention in Cascade Connection ...... 614
11.7.13 Counter Value during Complementary PWM Mode Stop .................................... 616
11.7.14 Buffer Operation Setting in Complementary PWM Mode ................................... 616
11.7.15 Reset Sync PWM Mode Buffer Operation and Compare Match Flag .................. 617
11.7.16 Overflow Flags in Reset Synchronous PWM Mode ............................................. 618
11.7.17 Contention between Overflow/Underflow and Counter Clearing......................... 619
11.7.18 Contention between TCNT Write and Overflow/Underflow................................ 620
11.7.19 Cautions on Transition from Normal Operation or PWM Mode 1
to Reset-Synchronized PWM Mode ..................................................................... 620
11.7.20 Output Level in Complementary PWM Mode
and Reset-Synchronized PWM Mode................................................................... 621
11.7.21 Interrupts in Module Standby Mode ..................................................................... 621
11.7.22 Simultaneous Capture of TCNT_1 and TCNT_2 in Cascade Connection............ 621
11.8 MTU2 Output Pin Initialization......................................................................................... 622
11.8.1 Operating Modes .................................................................................................. 622
11.8.2 Reset Start Operation ............................................................................................ 622
11.8.3 Operation in Case of Re-Setting Due to Error During Operation, etc. ................. 623
11.8.4 Overview of Initialization Procedures and Mode Transitions
in Case of Error during Operation, etc.................................................................. 624
Rev. 2.00 Mar. 14, 2008 Page xvi of xxxiv
REJ09B0290-0200