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| SH7263 Datasheet, PDF (1740/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series | |||
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Section 35 Electrical Characteristics
CKIO
A25 toA0
Ta1
Ta2
Ta3
T1
Tw
Tw
T2
tAD1
tAD1
CS5
RD/WR
tCSD1
tRWD1
tCSD1
tRWD1
AH
tAHD
tAHD
tAHD
Read
RD
D15 to D0
WE1, WE0
Write
D15 to D0
BS
tBSD
tRSD
tMAD
tAWH
Address
tMAH
tWED1
tMAD
tWDD1
tMAH
tAWH
tBSD
Address
Data
tRSD
tRDH1
tRDS1
Data
tWED1
tWDH4
tWDH1
WAIT
DACKn*
TENDn*
tDACD
tDACD
tWTH
tWTS
tWTH
tWTS
tDACD
tDACD
Note: * The waveform for DACKn and TENDn is when active low is specified.
Figure 35.17 MPX-I/O Interface Bus Cycle
(Three Address Cycles, One Software Wait Cycle, One External Wait Cycle)
Rev. 2.00 Mar. 14, 2008 Page 1706 of 1824
REJ09B0290-0200
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