SH7263 Datasheet, PDF (1216/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 23 D/A Converter (DAC)
23.4 Operation
The D/A converter includes D/A conversion circuits for two channels, each of which can operate
independently. When the DAOE bit in DACR is set to 1, D/A conversion is enabled and the
conversion result is output.
An operation example of D/A conversion on channel 0 is shown below. Figure 23.2 shows the
timing of this operation.
1. Write the conversion data to DADR0.
2. Set the DAOE0 bit in DACR to 1 to start D/A conversion. The conversion result is output from
the analog output pin DA0 after the conversion time t_DCONV has elapsed. The conversion result
continues to be output until DADR0 is written to again or the DAOE0 bit is cleared to 0. The
output value is expressed by the following formula:
Contents of DADR _{× AVref}
256
3. If DADR0 is written to again, the conversion is immediately started. The conversion result is
output after the conversion time t_DCONV has elapsed.
4. If the DAOE0 bit is cleared to 0, analog output is disabled.
DADR0
DACR
write cycle write cycle
DADR0
write cycle
DACR
write cycle
φ
Address
DADR0
Conversion data 1
Conversion data 2
DAOE0
DA0
High-impedance state
t_DCONV
[Legend]
t_DCONV: D/A conversion time
Conversion
result 1
t_DCONV
Conversion
result 2
Figure 23.2 Example of D/A Converter Operation
Rev. 2.00 Mar. 14, 2008 Page 1182 of 1824
REJ09B0290-0200