SH7263 Datasheet, PDF (476/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Table 11.1 MTU2 Functions
Item
Channel 0
Count clock
Pφ/1
Pφ/4
Pφ/16
Pφ/64
TCLKA
TCLKB
TCLKC
TCLKD
General registers
TGRA_0
TGRB_0
TGRE_0
General registers/
buffer registers
TGRC_0
TGRD_0
TGRF_0
I/O pins
TIOC0A
TIOC0B
TIOC0C
TIOC0D
Counter clear
function
TGR compare
match or input
capture
Compare 0 output √
match
output
1 output √
Toggle √
output
Input capture
√
function
Synchronous
√
operation
PWM mode 1
√
PWM mode 2
√
Complementary
—
PWM mode
Reset PWM mode —
AC synchronous
√
motor drive mode
Channel 1
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/256
TCLKA
TCLKB
TGRA_1
TGRB_1
—
TIOC1A
TIOC1B
TGR compare
match or input
capture
√
√
√
√
√
√
√
—
—
—
Channel 2
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/1024
TCLKA
TCLKB
TCLKC
TGRA_2
TGRB_2
—
TIOC2A
TIOC2B
TGR compare
match or input
capture
√
√
√
√
√
√
√
—
—
—
Channel 3
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/256
Pφ/1024
TCLKA
TCLKB
TGRA_3
TGRB_3
TGRC_3
TGRD_3
TIOC3A
TIOC3B
TIOC3C
TIOC3D
TGR compare
match or input
capture
√
√
√
√
√
√
—
√
√
√
Channel 4
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/256
Pφ/1024
TCLKA
TCLKB
TGRA_4
TGRB_4
TGRC_4
TGRD_4
TIOC4A
TIOC4B
TIOC4C
TIOC4D
TGR compare
match or input
capture
√
√
√
√
√
√
—
√
√
√
Rev. 2.00 Mar. 14, 2008 Page 442 of 1824
REJ09B0290-0200