SH7263 Datasheet, PDF (1625/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 33 User Debugging Interface (H-UDI)
Section 33 User Debugging Interface (H-UDI)
This LSI incorporates a user debugging interface (H-UDI) for emulator support.
33.1 Features
The user debugging interface (H-UDI) has reset and interrupt request functions.
The H-UDI in this LSI is used for emulator connection. Refer to the emulator manual for the
method of connecting the emulator.
Figure 33.1 shows a block diagram of the H-UDI.
TDI
SDBPR
SDIR
TDO
MUX
TCK
TMS
TRST
TAP control circuit
Decoder
Local
bus
[Legend]
SDBPR:
SDIR:
Bypass register
Instruction register
Figure 33.1 Block Diagram of H-UDI
Rev. 2.00 Mar. 14, 2008 Page 1591 of 1824
REJ09B0290-0200