SH7263 Datasheet, PDF (43/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 1 Overview
Items
Specification
I/O ports
• 82 I/Os, 16 inputs, and 1 output
• Input or output can be selected for each bit
• Internal weak keeper circuit
A/D converter (ADC) • 10-bit resolution
• Eight input channels
• A/D conversion request by the external trigger or timer trigger
D/A converter (DAC) • 8-bit resolution
• Two output channels
User break controller • Two break channels
(UBC)
• Addresses, data values, type of access, and data size can all be set
as break conditions
User debugging
interface (H-UDI)
• E10A emulator support
• JTAG-standard pin assignment
On-chip RAM
• 64-Kbyte memory for high-speed operation (16 Kbytes × 4)
• 16-Kbyte memory for data retention (4 Kbytes × 4)
Power supply voltage • Vcc: 1.1 to 1.3 V
• PVcc: 3.0 to 3.6 V
Packages
• QFP3232-240Cu (0.5 pitch)
Rev. 2.00 Mar. 14, 2008 Page 9 of 1824
REJ09B0290-0200