SH7263 Datasheet, PDF (1568/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 30 I/O Ports
30.6 Port E
Port E is an input/output port with sixteen pins as shown in figure 30.5.
Port E
PE15 (I/O) / IOIS16 (input) / RTS3 (I/O)
PE14 (I/O) / CS1 (output) / CTS3 (I/O)
PE13 (I/O) / TxD3 (output)
PE12 (I/O) / RxD3 (input)
PE11 (I/O) / CS6/CE1B (output) / IRQ7 (input) / TEND1 (output)
PE10 (I/O) / CE2B (output) / IRQ6 (input) / TEND0 (output)
PE9 (I/O) / CS5/CE1A (output) / IRQ5 (input) / SCK3 (I/O)
PE8 (I/O) / CE2A (output) / IRQ4 (input) / SCK2 (I/O)
PE7 (I/O) / FRAME (output) / IRQ3 (input) / TxD2 (output) / DACK1 (output)
PE6 (I/O) / A25 (output) / IRQ2 (input) / RxD2 (input) / DREQ1 (input)
PE5 (I/O) / A24 (output) / IRQ1 (input) / TxD1 (output) / DACK0 (output)
PE4 (I/O) / A23 (output) / IRQ0 (input) / RxD1 (input) / DREQ0 (input)
PE3 (I/O) / A22 (output) / SCK1 (I/O)
PE2 (I/O) / A21 (output) / SCK0 (I/O)
PE1 (I/O) / CS4 (output) / MRES (input) / TxD0 (output)
PE0 (I/O) / BS (output) / RxD0 (input) / ADTRG (input)
Figure 30.5 Port E
30.6.1 Register Descriptions
Table 30.9 lists the port E registers.
Table 30.9 Register Configuration
Register Name
Abbreviation R/W Initial Value Address
Access Size
Port E data register L PEDRL
R/W H'0000
H'FFFE3A02 8, 16
Port E port register L PEPRL
R
H'xxxx
H'FFFE3A1E 8, 16
Rev. 2.00 Mar. 14, 2008 Page 1534 of 1824
REJ09B0290-0200