SH7263 Datasheet, PDF (1071/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 20 IEBus^TM Controller (IEB)
20.3.4 IEBus Master Unit Address Register 1 (IEAR1)
IEAR1 sets the lower four bits of the master unit address and communications mode. In master
communications, the master unit address becomes the master address field value. In slave
communications, the master unit address is compared with the received slave address field.
Bit: 7
6
5
4
3
2
1
0
IARL4
IMD
-
STE
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R R/W
Bit
7 to 4
3, 2
1
0
Initial
Bit Name Value R/W
IARL4
0000 R/W
IMD
00
R/W
⎯
0
R
STE
0
R/W
Description
Lower 4 Bits of IEBus Master Unit Address
Set the lower 4 bits of the master unit address. This
register becomes the master address field value. In
slave communications, the master unit address is
compared with the received slave address field
IEBus Communications Mode
Set IEBus communications mode.
00: Communications mode 0
01: Communications mode 1
10: Communications mode 2
11: Setting prohibited
Reserved
This bit is always read as 0. The write value should
always be 0.
Slave Transmission Setting
Sets bit 4 in the slave status register. Transmitting the
slave status register informs the master unit that the
slave transmission enabled state is entered by setting
this bit to 1. Note that this bit only sets the slave status
register value and does not directly affect slave
transmission.
0: Bit 4 in the slave status register is 0 (slave
transmission stop state)
1: Bit 4 in the slave status register is 1 (slave
transmission enabled state)
Rev. 2.00 Mar. 14, 2008 Page 1037 of 1824
REJ09B0290-0200