SH7263 Datasheet, PDF (1064/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 20 IEBus^TM Controller (IEB)
20.3 Register Descriptions
The IEB has the following registers.
Each register, in principle, has 8-bit width and is accessed in 8 bits.
Table 20.8 Register Configuration
Register Name
Initial
Abbreviation R/W Value
IEBus control register
IECTR
R/W H'00
IEBus command register
IECMR
W
H'00
IEBus master control register
IEMCR
R/W H'00
IEBus master unit address
register 1
IEAR1
R/W H'00
IEBus master unit address
register 2
IEAR2
R/W H'00
IEBus slave address setting
register 1
IESA1
R/W H'00
IEBus slave address setting
register 2
IESA2
R/W H'00
IEBus transmit message length
register
IETBFL
R/W H'00
IEBus reception master address IEMA1
register 1
R
H'00
IEBus reception master address IEMA2
register 2
R
H'00
IEBus receive control field register IERCTL
R
H'00
IEBus receive message length
register
IERBFL
R
H'00
IEBus lock address register 1
IELA1
R
H'00
IEBus lock address register 2
IELA2
R
H'00
IEBus general flag register
IEFLG
R
H'00
IEBus transmit status register
IETSR
R/(W)* H'00
IEBus transmit interrupt enable
register
IEIET
R/W H'00
IEBus receive status register
IERSR
R/(W)* H'00
Address
H'FFFE F000
H'FFFE F001
H'FFFE F002
H'FFFE F003
Access
Size
8
8
8
8
H'FFFE F004 8
H'FFFE F005 8
H'FFFE F006 8
H'FFFE F007 8
H'FFFE F009 8
H'FFFE F00A 8
H'FFFE F00B 8
H'FFFE F00C 8
H'FFFE F00E 8
H'FFFE F00F 8
H'FFFE F010 8
H'FFFE F011 8
H'FFFE F012 8
H'FFFE F014 8
Rev. 2.00 Mar. 14, 2008 Page 1030 of 1824
REJ09B0290-0200