SH7263 Datasheet, PDF (1067/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 20 IEBus^TM Controller (IEB)
Bit
4
3
2 to 0
Initial
Bit Name Value R/W
⎯
0
R
RE
0
R/W
⎯
0
R
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Receive Enable
Enables/disables IEB reception. This bit must be set at
the initial setting before frame reception.
0: Reception is disabled.
1: Reception is enabled.
Reserved
These bits are always read as 0. The write value should
always be 0.
20.3.2 IEBus Command Register (IECMR)
IECMR issues commands to control IEB communications. Since this register is a write-only
register, the read value is undefined.
Bit: 7
6
5
4
3
2
1
0
-
-
-
-
-
CMD
Initial value: 0
0
0
0
0
0
0
0
R/W: -
-
-
-
-
WWW
Bit
7 to 3
Initial
Bit Name Value R/W
⎯
All 0 ⎯
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 2.00 Mar. 14, 2008 Page 1033 of 1824
REJ09B0290-0200