SH7263 Datasheet, PDF (1360/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 USB 2.0 Host/Function Module (USB)
• If a short packet is received when the SHTNAK bit in PIPECFG has been set to 1 for
bulk transfer.
• If the transaction counter ended when the SHTNAK bit has been set to 1 for bulk
transfer.
B. BUF setting: There is no BUF writing by this module.
C. STALL setting: In the following cases, PID = STALL is set and issuing of tokens is
automatically stopped:
• When STALL is received in response to the transmitted token.
• When the size of the receive data packet exceeds the maximum packet size.
• When the function controller function has been selected and the response PID is set by
hardware:
A. NAK setting: In the following cases, PID = NAK is set and NAK is always returned in
response to transactions:
• When the SETUP token is received normally (DCP only).
• If the transaction counter ended or a short packet is received when the SHTNAK bit in
PIPECFG has been set to 1 for bulk transfer.
B. BUF setting: There is no BUF writing by this module.
C. STALL setting: In the following cases, PID = STALL is set and STALL is always returned
in response to transactions:
• When the size of the receive data packet exceeds the maximum packet size.
• When a control transfer sequence error has been detected.
(5) Registers that Should Not be Set in the USB Communication Enabled (PID = BUF)
State
• The ISEL bit in CFIFOSEL (applies only when DCP is selected)
• The TGL and SCLR bits in CFIFOSIE
• The DCLRM, TRENB, TRCLR, and DEZPM bits in DnFIFOSEL
• The TRNCNT bit in DxFIFOTRN
• Bits in DCPCFG
• Bit in DCPMAXP
• Bits in DCPCTR (excepting the CCPL bit)
• Bits in PIPECFG
• Bits in PIPEBUF
• Bits in PIPEMAXP
• Bits in PIPEPERI
Rev. 2.00 Mar. 14, 2008 Page 1326 of 1824
REJ09B0290-0200