SH7263 Datasheet, PDF (1781/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 35 Electrical Characteristics
35.4.13 ADC Timing
Table 35.18 ADC Timing
Conditions: VCC = PLLVCC = USBDVCC = 1.1 to 1.3 V, PVCC = USBDPVCC = 3.0 to 3.6 V,
AVCC = 3.0 to 3.6 V, USBAVCC = 1.1 to 1.3 V, USBAPVCC = 3.0 to 3.6 V,
VSS = PLLVSS = PVSS = AVSS = USBDVSS = USBAVSS = USBDPVSS =
USBAPVSS = 0V, Ta = −40 to 85 °C
Module Item
A/D
Trigger
converter input setup
time
B:P clock ratio = 1:1
B:P clock ratio = 2:1
B:P clock ratio = 4:1
Symbol Min.
Max. Unit Figure
t_TRGS
17
— ns Figure 35.63
t_cyc + 17
—
3 × t + 17 —
cyc
CKIO
ADTRG
t_TRGS
Figure 35.63 A/D Converter External Trigger Input Timing
Rev. 2.00 Mar. 14, 2008 Page 1747 of 1824
REJ09B0290-0200