SH7263 Datasheet, PDF (1422/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 26 LCD Controller (LCDC)
26.3.15 LCDC AC Modulation Signal Toggle Line Number Register (LDACLNR)
LDACLNR specifies the timing to toggle the AC modulation signal (LCD current-alternating
signal) of the LCD module.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
- ACLN4 ACLN3 ACLN2 ACLN1 ACLN0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 5 ⎯
All 0 R
Reserved
These bits are always read as 0. The write value should
always be 0.
4
ACLN4
0
R/W AC Line Number
3
ACLN3
1
R/W Set the number of lines where the LCD current-
2
ACLN2
1
R/W ^{alternating signal of the LCD module is toggled (unit:}
line).
1
ACLN1
0
R/W
Specify to the value of (the number of toggle line) -1.
0
ACLN0
0
R/W
Example: For toggling every 13 lines.
ACLN = 13-1 = 12= H'0C
Note: When the total line number of the LCD panel is even, set an even number so that toggling is
performed at an odd line.
Rev. 2.00 Mar. 14, 2008 Page 1388 of 1824
REJ09B0290-0200