SH7263 Datasheet, PDF (1443/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 26 LCD Controller (LCDC)
26.4.3 Color Palette Specification
Color Palette Register: This LCDC has a color palette which outputs 24 bits of data per entry and
is able to simultaneously hold 256 entries. The color palette thus allows the simultaneous display
of 256 colors chosen from among 16-M colors.
The procedure below may be used to set up color palettes at any time.
1. The PALEN bit in the LDPALCR is 0 (initial value); normal display operation
2. Access LDPALCR and set the PALEN bit to 1; enter color-palette setting mode after three
cycles of peripheral clock.
3. Access LDPALCR and confirm that the PALS bit is 1.
4. Access LDPR00 to LDPRFF and write the required values to the PALD00 to PALDFF bits.
5. Access LDPALCR and clear the PALEN bit to 0; return to normal display mode after a cycle
of peripheral clock.
A 0 is output on the LCDC display data output (LCD_DATA) while the PALS bit in LDPALCR is
set to 1.
31
Color
23
15
7
0
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Monochrome
M7 M6 M5 M4 M3 M2 M1 M0
Figure 26.3 Color-Palette Data Format
PALDnn color and gradation data should be set as above.
For a color display, PALDnn[23:16], PALDnn[15:8], and PALDnn[7:0] respectively hold the R,
G, and B data. Although the bits PALDnn[18:16], PALDnn[9:8], and PALDnn[2:0] exist, no
memory is associated with these bits. PALDnn[18:16], PALDnn[9:8], and PALDnn[2:0] are thus
not available for storing palette data. The numbers of valid bits are thus R: 5, G: 6, and B: 5. A 24-
bit (R: 8 bits, G: 8 bits, and B: 8 bits) data should, however, be written to the palette-data registers.
When the values for PALDnn[23:19], PALDnn[15:10], or PALDnn[7:3] are not 0, 1 or 0 should
be written to PALDnn[18:16], PALDnn[9:8], or PALDnn[2:0], respectively. When the values of
PALDnn[23:19], PALDnn[15:10], or PALDnn[7:3] are 0, 0s should be written to
PALDnn[18:16], PALDnn[9:8], or PALDnn[2:0], respectively. Then 24 bits are extended.
Grayscale data for a monochromatic display should be set in PALDnn[7:3]. PALDnn[23:8] are all
"don't care". When the value in PALDnn[7:3] is not 0, 1s should be written to PALDnn[2:0].
When the value in PALDnn[7:3] is 0, 0s should be written to PALDnn[2:0]. Then 8 bits are
extended.
Rev. 2.00 Mar. 14, 2008 Page 1409 of 1824
REJ09B0290-0200