SH7263 Datasheet, PDF (1856/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

SYSCFG ........................................... 1235
SYSCR1 ........................................... 1565
SYSCR2 ........................................... 1567
SYSCR3 ........................................... 1568
SYSSTS............................................ 1237
TADCOBRA_4 .................................. 489
TADCOBRB_4 .................................. 489
TADCORA_4..................................... 489
TADCORB_4 ..................................... 489
TADCR .............................................. 486
TBTER ............................................... 510
TBTM................................................. 484
TCBR.................................................. 507
TCDR ................................................. 506
TCMR0....................................... 976, 977
TCMR1............................................... 977
TCMR2............................................... 977
TCNT.................................................. 490
TCNTR............................................... 975
TCNTS ............................................... 505
TCR .................................................... 451
TDDR ................................................. 506
TDER.................................................. 512
TEC .................................................... 950
TESTMODE..................................... 1243
TGCR ................................................. 503
TGR .................................................... 490
TICCR ................................................ 485
TIER ................................................... 476
TIOR................................................... 458
TITCNT.............................................. 509
TITCR ................................................ 507
TMDR ................................................ 455
TOCR1 ............................................... 496
TOCR2 ............................................... 499
TOER.................................................. 495
TOLBR............................................... 502
TRWER .............................................. 494
TSR............................................. 479, 972
TSTR .................................................. 491
Rev. 2.00 Mar. 14, 2008 Page 1822 of 1824
REJ09B0290-0200
TSYR .................................................. 492
TTCR0 ................................................ 966
TTTSEL.............................................. 978
TWCR................................................. 513
TXACK0............................................. 958
TXACK1............................................. 957
TXCR0................................................ 957
TXCR1................................................ 956
TXPR0 ................................................ 955
TXPR1 ................................................ 954
UFRMNUM...................................... 1280
UMSR0 ............................................... 965
UMSR1 ............................................... 964
USBACSWR .................................... 1301
USBADDR ....................................... 1281
USBINDX......................................... 1283
USBLENG ........................................ 1284
USBREQ........................................... 1282
USBVAL .......................................... 1283
WRCSR .............................................. 673
WTCNT .............................................. 670
WTCSR............................................... 671
Registers that should not be set in the
USB communication enabled state ....... 1326
Relationship between access size
and number of bursts............................... 324
Relationship between refresh requests
and bus cycles ......................................... 343
Reset sequence........................................ 982
Reset state ................................................. 85
Reset-synchronized PWM mode............. 544
Restoration from bank............................. 182
Restoration from stack ............................ 183
Restriction on DMAC usage................... 779
Resume interrupt................................... 1321
RISC-type instruction set.......................... 48
Roles of mailboxes.................................. 915
Round to nearest ....................................... 96
Rounding................................................... 96
Round-robin mode .................................. 422