SH7263 Datasheet, PDF (1646/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 34 List of Registers
Module
Name
IIC3
SSI
RCAN-
TL1
Register Name
I²C bus interrupt enable register
I²C bus status register
Slave address register
I²C bus transmit data register
I²C bus receive data register
NF2CYC register
Control register 0
Status register 0
Transmit data register 0
Receive data register 0
Control register 1
Status register 1
Transmit data register 1
Receive data register 1
Control register 2
Status register 2
Transmit data register 2
Receive data register 2
Control register 3
Status register 3
Transmit data register 3
Receive data register 3
Master Control Register_0
General Status Register_0
Bit Configuration Register 1_0
Bit Configuration Register 0_0
Interrupt Register_0
Interrupt Mask Register_0
Error Counter Register_0
Transmit Pending Register 1_0
Transmit Pending Register 0_0
Abbreviation
ICIER_3
ICSR_3
SAR_3
ICDRT_3
ICDRR_3
NF2CYC_3
SSICR_0
SSISR_0
SSITDR_0
SSIRDR_0
SSICR_1
SSISR_1
SSITDR_1
SSIRDR_1
SSICR_2
SSISR_2
SSITDR_2
SSIRDR_2
SSICR_3
SSISR_3
SSITDR_3
SSIRDR_3
MCR_0
GSR_0
BCR1_0
BCR0_0
IRR_0
IMR_0
TEC_REC_0
TXPR1_0
TXPR0_0
Rev. 2.00 Mar. 14, 2008 Page 1612 of 1824
REJ09B0290-0200
Number
of Bits Address
8
H'FFFEEC03
8
H'FFFEEC04
8
H'FFFEEC05
8
H'FFFEEC06
8
H'FFFEEC07
8
H'FFFEEC08
32
H'FFFFC000
32
H'FFFFC004
32
H'FFFFC008
32
H'FFFFC00C
32
H'FFFFC800
32
H'FFFFC804
32
H'FFFFC808
32
H'FFFFC80C
32
H'FFFFD000
32
H'FFFFD004
32
H'FFFFD008
32
H'FFFFD00C
32
H'FFFFD800
32
H'FFFFD804
32
H'FFFFD808
32
H'FFFFD80C
16
H'FFFF0000
16
H'FFFF0002
16
H'FFFF0004
16
H'FFFF0006
16
H'FFFF0008
16
H'FFFF000A
16
H'FFFF000C
16
H'FFFF0020
16
H'FFFF0022
Access
Size
8
8
8
8
8
8
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
16
16
16
16
16
16
8, 16
32
16