SH7263 Datasheet, PDF (1005/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 19 Controller Area Network (RCAN-TL1)
(3) Reference Trigger Offset Register (RFTROFF)
This is a 8-bit read/write register that affects Tx-Trigger Time (TTT) of Mailbox-30. The TTT of
Mailbox-30 is compared with CYCTR after RFTROFF extended with sign is added to the TTT.
However, the value of TTT is not modified. The offset value doesn't affect others except Mailbox-
30.
• RFTROFF (Address = H'086)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
RFTROFF[7:0]
-
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R
R
R
R
R
R
R
R
Bit 15 to 8 — Indicate the value of Reference Trigger Offset.
Bits 7 to 0: Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Description
0
0
0
0
0
0
0
0
Ref_trigger_offset = +0
(initial value)
0
0
0
0
0
0
0
1
Ref_trigger_offset = +1
0
0
0
0
0
0
1
0
Ref_trigger_offset = +2
.
.
.
.
.
.
.
.
0
1
1
1
1
1
1
1
Ref_trigger_offset = +127
.
.
.
.
.
.
.
.
1
1
1
1
1
1
1
1
Ref_trigger_offset = −1
1
1
1
1
1
1
1
0
Ref_trigger_offset = −2
.
.
.
.
.
.
.
.
1
0
0
0
0
0
0
1
Ref_trigger_offset = −127
1
0
0
0
0
0
0
0
Prohibited
Rev. 2.00 Mar. 14, 2008 Page 971 of 1824
REJ09B0290-0200