SH7263 Datasheet, PDF (1737/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

CKIO
A25 to A0
CSn
RD/WR
Read
RD
D31 to D0
Write
WEn
D31 to D0
BS
DACKn
TENDn*
WAIT
T1
t_AD1
t_AS
t_CSD1
t_CS
t_RWD1
tRSD
Section 35 Electrical Characteristics
Tw
T2
t_AD1
t_CSD1
t_RWD1
t_RSD
tAH
tRDS1
t_RDH1
t_WED1
t_WDD1
t_WED1
t_AH
tWDH1
tBSD
t_DACD
t_BSD
t_WTH
tWTS
t_DACD
Note: * The waveform for DACKn and TENDn is when active low is specified.
Figure 35.14 Basic Bus Timing for Normal Space (One Software Wait Cycle)
Rev. 2.00 Mar. 14, 2008 Page 1703 of 1824
REJ09B0290-0200