SH7263 Datasheet, PDF (1326/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name
Value R/W Description
10
BFRE
0
R/W BRDY Interrupt Operation Specification
0: BRDY interrupt upon transmitting or receiving of
data
1: BRDY interrupt upon reading of data
If this bit is set to 1, BRDY interrupts are not
generated when the buffer is set to the data writing
direction.
9
DBLB
0
R/W Double Buffer Mode
0: Single buffer
1: Double buffer
This bit is valid when PIPE1 to PIPE5 are selected.
The procedure to change this bit for a PIPE is shown
below:
• Single buffer to double buffer (DBLB = 0 to DBLB
= 1)
(1) Set the PID bit to NAK for the corresponding
pipe.
(2) Set the ACLRM bit in PIPEnCTR to 1.
(3) Wait for 100 ns using software.
(4) Clear the ACLRM bit to 0.
(5) Change the DBLB bit to 1.
(6) Set the response PID bit to BUF.
• Double buffer to single buffer (DBLB = 1 to DBLB
= 0)
(1) Set the PID bit to NAK for the corresponding
pipe.
(2) Change the DBLB bit.
(3) Set the ACLRM bit in PIPEnCTR to 1.
(4) Wait for 100 ns using software.
(5) Clear the ACLRM bit to 0.
(6) Set the response PID bit to BUF.
Rev. 2.00 Mar. 14, 2008 Page 1292 of 1824
REJ09B0290-0200