SH7263 Datasheet, PDF (1848/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

C
Cache ...................................................... 211
Cache operations .................................... 224
Calculating exception handling vector table
addresses................................................. 122
CAN bus interface ................................ 1007
CAN interface......................................... 910
Canceling software standby mode
(WDT) .................................................... 676
Cascaded operation................................. 527
Caution on period setting........................ 607
CD-ROM decoder (ROM-DEC)........... 1079
Changing the division ratio..................... 113
Changing the frequency.................. 112, 676
Changing the multiplication rate ............ 112
Clock frequency control circuit .............. 101
Clock operating modes ........................... 104
Clock pulse generator (CPG).................... 99
Clock timing ......................................... 1694
Clocked synchronous serial format ........ 853
CMCNT count timing............................. 661
Coherency of cache
and external memory .............................. 225
Color-palette data format...................... 1409
Command access mode ........................ 1217
Communications protocol..................... 1016
Compare match timer (CMT) ................. 655
Complementary PWM mode .................. 547
Conditions for determining number
of idle cycles........................................... 373
Conditions for generating
a transaction.......................................... 1360
Configuration of RCAN-TL1 ................. 982
Conflict between byte-write and count-up
processes of CMCNT ............................. 666
Conflict between word-write and count-up
processes of CMCNT ............................. 665
Conflict between write and compare-match
processes of CMCNT ............................. 664
Conflict error .......................................... 814
Rev. 2.00 Mar. 14, 2008 Page 1814 of 1824
REJ09B0290-0200
Control signal timing ............................ 1698
Control transfer stage transition interrupt
.............................................................. 1318
Control transfers when the function
controller function is selected ............... 1346
Control transfers when the host controller
function is selected................................ 1345
Controller area network (RCAN-TL1) ... 905
CPU .......................................................... 41
Crystal oscillator ..................................... 101
CSn assert period expansion ................... 303
Cycle steal mode..................................... 429
D
D/A converter (DAC) ........................... 1177
D/A converter characteristics................ 1768
D/A output hold function in software
standby mode ........................................ 1183
Data array........................................ 212, 227
Data array read........................................ 227
Data array write ...................................... 228
Data format in registers............................. 46
Data formats in memory ........................... 46
Data PID sequence bit........................... 1327
Data transfer instructions .......................... 67
Data transfer with interrupt request
signals ..................................................... 185
DC characteristics ................................. 1685
Deep power-down mode ......................... 351
Deep standby mode............................... 1583
Definitions of A/D conversion
accuracy ................................................ 1172
Delayed branch instructions...................... 49
Denormalized numbers ............................. 92
Device state transition interrupt ............ 1316
Direct memory access controller
(DMAC).................................................. 385
Displacement accessing ............................ 51
Divider 1 ................................................. 101
Divider 2 ................................................. 101