SH7263 Datasheet, PDF (1602/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 32 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
2
RAMWE2 1
R/W RAM Write Enable 2 (corresponding area of on-chip
RAM (high-speed): page 2*)
0: Write to on-chip RAM (high-speed) disabled
1: Write to on-chip RAM (high-speed) enabled
1
RAMWE1 1
R/W RAM Write Enable 1 (corresponding area of on-chip
RAM (high-speed): page 1*)
0: Write to on-chip RAM (high-speed) disabled
1: Write to on-chip RAM (high-speed) enabled
0
RAMWE0 1
R/W RAM Write Enable 0 (corresponding area of on-chip
RAM (high-speed): page 0*)
0: Write to on-chip RAM (high-speed) disabled
1: Write to on-chip RAM (high-speed) enabled
Note: * For addresses in each page, see section 31, On-Chip RAM.
32.2.9 System Control Register 3 (SYSCR3)
SYSCR3 is an 8-bit readable/writable register that performs the software reset control for the SSI0
to SSI3 and the IEB. Only byte access is valid.
Note: When writing to this register, see section 32.4, Usage Notes.
Bit: 7
6
AXT
ALE
-
Initial value: 0
0
R/W: R/W R
5
4
3
2
1
0
-
IEB SSI3 SSI2 SSI1 SSI0
SRST SRST SRST SRST SRST
0
0
0
0
0
0
R R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
7
AXTALE 0
R/W Audio Crystal Resonator Enable
Enables or disables the functions of the crystal
resonator for audio.
0: Enables crystal resonator functions for audio.
1: Disables crystal resonator functions for audio.
Rev. 2.00 Mar. 14, 2008 Page 1568 of 1824
REJ09B0290-0200