SH7263 Datasheet, PDF (1166/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 CD-ROM Decoder (ROM-DEC)
21.4 Operation
21.4.1 Endian Conversion for Data in the Input Stream
Stream data must be input to the core of the CD-ROM decoder in order according to the CD-ROM
data format specifications. In some systems, however, the order of the data from the SSI may have
to be changed or the data will have been padded before transfer. To cope with this, the stream data
input control section is capable of swapping the order of the data and preventing the input of
padding data to the core of the CD-ROM decoder. These functions are controlled through the SSI
data control register (SSI).
Figure 21.6 shows a case where the upper and lower 16 bits of the data, consisting of padding data
plus the first 2 bytes of sync code, that is, H’000000FF, are swapped (H’00FF0000) and input to
the CD-ROM decoder as the stream data.
STRMDIN0
BUFEND0[1:0] = 01
H'00FF
H'00FF
STRMDIN2
H'00FF
Core of CD-ROM decoder
H'0000
BUFEND1[1:0] = 00
BYTEND = 0
Figure 21.6 Example of Padded Stream Data Control by the SSI Register
Rev. 2.00 Mar. 14, 2008 Page 1132 of 1824
REJ09B0290-0200