SH7263 Datasheet, PDF (31/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 30 I/O Ports .........................................................................................1519
30.1 Features............................................................................................................................ 1519
30.2 Port A............................................................................................................................... 1520
30.2.1 Register Descriptions.......................................................................................... 1520
30.2.2 Port A Data Register L (PADRL) ....................................................................... 1520
30.3 Port B ............................................................................................................................... 1522
30.3.1 Register Descriptions.......................................................................................... 1522
30.3.2 Port B Data Register L (PBDRL) ....................................................................... 1523
30.3.3 Port B Port Register L (PBPRL) ......................................................................... 1525
30.4 Port C ............................................................................................................................... 1526
30.4.1 Register Descriptions.......................................................................................... 1526
30.4.2 Port C Data Register L (PCDRL) ....................................................................... 1527
30.4.3 Port C Port Register L (PCPRL) ......................................................................... 1529
30.5 Port D............................................................................................................................... 1530
30.5.1 Register Descriptions.......................................................................................... 1530
30.5.2 Port D Data Registers L (PDDRL) ..................................................................... 1531
30.5.3 Port D Port Registers L (PDPRL) ....................................................................... 1533
30.6 Port E ............................................................................................................................... 1534
30.6.1 Register Descriptions.......................................................................................... 1534
30.6.2 Port E Data Registers L (PEDRL) ...................................................................... 1535
30.6.3 Port E Port Registers L (PEPRL)........................................................................ 1537
30.7 Port F ............................................................................................................................... 1538
30.7.1 Register Descriptions.......................................................................................... 1539
30.7.2 Port F Data Registers H and L (PFDRH, PFDRL) ............................................. 1539
30.7.3 Port F Port Registers H and L (PFPRH, PFPRL)................................................ 1543
30.8 Usage Notes ..................................................................................................................... 1545
Section 31 On-Chip RAM ...............................................................................1547
31.1 Features............................................................................................................................ 1547
31.2 Usage Notes ..................................................................................................................... 1549
31.2.1 Page Conflict ...................................................................................................... 1549
31.2.2 RAME and RAMWE Bits .................................................................................. 1549
31.2.3 Areas where Placing Instructions is Prohibited .................................................. 1550
Section 32 Power-Down Modes ......................................................................1551
32.1 Features............................................................................................................................ 1551
32.1.1 Power-Down Modes ........................................................................................... 1551
32.2 Register Descriptions ....................................................................................................... 1554
32.2.1 Standby Control Register (STBCR).................................................................... 1555
32.2.2 Standby Control Register 2 (STBCR2)............................................................... 1556
Rev. 2.00 Mar. 14, 2008 Page xxxi of xxxiv
REJ09B0290-0200