SH7760 Datasheet, PDF (996/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Input/output pins
MCCLK
MCCMD
MCDAT
Command output (48 bits)
Command response
reception
(Busy state)
CMDSTRT
(START)
INTSTR0
(CMDI)
(CRPI)
(DBSYI)
CSTR
(CWRE)
(BUSY)
(DTBUSY_TU)
Command transmission
started
Response reception
completed
Busy state
completed
Command transmission
period
Command sequence execution period
(DTBUSY)
Data busy period
(REQ)
Figure 26.6 Example of Command Sequence for Commands without Data Transfer
(with Data Busy State)
Rev. 1.0, 02/03, page 946 of 1294