SH7760 Datasheet, PDF (912/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

24.2.15 Port E Data Register (PEDR)
PEDR is an 8-bit readable/writable register that stores port E data.
Bit: 7
6
5
4
3
2
1
0
PE7DT PE6DT PE5DT PE4DT PE3DT PE2DT PE1DT PE0DT
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name Initial value R/W Description
7
PE7DT
0
6
PE6DT
0
5
PE5DT
0
4
PE4DT
0
3
PE3DT
0
2
PE2DT
0
R/W These bits store output data of a pin which is used
R/W ^{as a general output port. When the pin functions}
as a general output port, if the port is read, the
R/W _{value of this corresponding register will be read}
R/W ^{out. When the pin functions as a general input}
port, if the port is read, the status of the
R/W _{corresponding pin will be read out.}
R/W
1
PE1DT
0
R/W
0
PE0DT
0
R/W
24.2.16 Port F Data Register (PFDR)
PFDR is an 8-bit readable/writable register that stores port F data.
Bit: 7
6
5
4
3
2
1
0
-
-
-
- _{PF3DT PF2DT PF1DT PF0DT}
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R R/W R/W R/W R/W
Bit
7 to 4
Bit Name

3
PF3DT
2
PF2DT
1
PF1DT
0
PF0DT
Initial value R/W
All 0
R
0
R/W
0
R/W
0
R/W
0
R/W
Description
Reserved
These bits are always read as 0, and the write
value should always be 0.
These bits store output data of a pin which is used
as a general output port. When the pin functions
as a general output port, if the port is read, the
value of this corresponding register will be read
out. When the pin functions as a general input
port, if the port is read, the status of the
corresponding pin will be read out.
Rev. 1.0, 02/03, page 862 of 1294