SH7760 Datasheet, PDF (495/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

11.5 Examples of Use
11.5.1 Examples of Transfer between External Memory and an External Device with
DACK
(1) External Request 2-Channel Mode
Examples of transfer of data in external memory to an external device with DACK using
DMAC channel 1 in external request 2-channel mode are considered here.
Table 11.11 (1) shows the transfer conditions and the corresponding register settings.
Table 11.11 (1) Conditions for Transfer between External Memory and External Device
with DACK, and Corresponding Register Settings
Transfer Condition
Register
Setting
Transfer source: external memory
SAR1
H'0C00 0000
Transfer destination: external device with DACK DAR1
(Accessed by DACK)
Number of transfers: 32
DMATCR1
H'0000 0020
Transfer source address: decremented
CHCR1
H'0000 22A5*
Transfer destination address: (setting invalid)
Transfer request source: external pin (DREQ1)
edge detection
Bus mode: burst
Transfer unit: word
No interrupt request at end of transfer
External request 2-channel mode
DMAOR
H'0000 0201
Channel priority order: 2 > 0 > 1 > 3 > 4 > 5 > 6 > 7
Note: * When DREQ1 is specified as a DMA transfer request source in external request 2-channel
mode, only channel 1 accepts the DMA transfer request (DREQ0 is accepted only by
channel 0).
(2) DMABRG Mode
Examples of data transfer from external memory to an external device with DACK using
DMAC channel 1 in DMABRG mode are considered here.
Table 11.11 (2) shows the transfer conditions and the corresponding register settings.
Rev. 1.0, 02/03, page 445 of 1294