SH7760 Datasheet, PDF (518/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

(13) Standby Control Register (STBCR)
STBCR contains power-saving mode control bits. For further information on STBCR, see
section 14, Power-Down Modes.
(14) Standby Control Register 2 (STBCR2)
STBCR2 contains power-saving mode control bits. For further information on STBCR2, see
section 14, Power-Down Modes.
12.2 Input/Output Pins
Table 12.1 shows the CPG pin configuration and function.
Table 12.1 Pin Configuration and Function of an Oscillation Circuit
Pin Name
Mode control pins
Crystal I/O pins
(clock input pins)
Abbreviation
MD0
MD1
MD2
XTAL
EXTAL
I/O
Input
Output
Input
MD8
Input
Clock output pins CKIO
DCK
CKIO enable pin CKE
Note: * Set to 1 by a power-on reset.
Output
Output
Output
Function
These bits set clock operating mode.
Connects crystal resonator.
Connects crystal resonator, or used as
external clock input pin.
Selects use/non-use of crystal resonator.
When MD8 = 0, external clock is input from
the EXTAL pin.
When MD8 = 1, crystal resonator is connected
directly to the EXTAL and XTAL pins.
Used as external clock output pins.
Level can also be fixed.
0 when CKIO output clock is unstable*.
Rev. 1.0, 02/03, page 468 of 1294