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SH7760 Datasheet, PDF (893/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine
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Pin Name
Port GPIO
MFI Mode
(MD7=0)
LCD Mode
(MD7 = 1)
HSPI_CS/SIM_RST/MCCMD*1 F
PTF0 input/output
HSPI/MMCIF/SIM
SCIF0_CLK
G
PTG7 input/output
SCIF[0]
SCIF0_RXD
G
PTG6 input/output
SCIF[0]
SCIF0_TXD
G
PTG5 input/output
SCIF[0]
SCIF1-CLK
G
PTG4 input/output
SCIF[1]
SCIF1_CTS
G
PTG3 input/output
SCIF[1]
SCIF1_RTS
G
PTG2 input/output
SCIF[1]
SCIF1_RXD
G
PTG1 input/output
SCIF[1]
SCIF1_TXD
G
PTG0 input/output
SCIF[1]
SCIF2-CLK
H
PTH7 input/output
SCIF[2]
SCIF2_CTS*3
H
PTH6 input/output
SCIF[2]
SCIF2_RTS*3
H
PTH5 input/output
SCIF[2]
SCIF2_RXD
H
PTH4 input/output
SCIF[2]
SCIF2_TXD
H
PTH3 input/output
SCIF[2]
UCLK
H
PTH2 input/output
USB
USB_PENC*3
H
PTH1 input/output
USB
USB_OVC
H
PTH0 input/output
USB
HAC_BIT_CLK0
J
PTJ7 input/output
HAC[0]/SSI[0]
HAC_RES
J
PTJ6 input/output
HAC[1][0]
SSI1_WS/HAC_SYNC1*1
J
PTJ5 input/output
HAC[1]/SSI[1]
SSI1_SCK/HAC_SD_IN1
J
PTJ4 input/output
HAC[1]/SSI[1]
SSI1_SDATA/HAC_SD_OUT1*1 J
PTJ3 input/output
HAC[1]/SSI[1]
HAC_BIT_CLK1
J
PTJ2 input/output
HAC[1]/SSI[1]
DCK
J
PTJ1 output
DCK
Reserved/AUDATA[3] *1*3
K
PTK7 input/output
Reserved/AUD
Reserved/AUDATA[2] *1
K
PTK6 input/output
Reserved/AUD
Reserved/AUDATA[1] *1
K
PTK5 input/output
Reserved/AUD
Reserved/AUDCK *1
K
PTK4 input/output
Reserved/AUD
Reserved/AUDSYNC *1
K
PTK3 input/output
Reserved/AUD
ADTRG/AUDATA[0]*1
K
PTK2 input/output
ADC/AUD
Notes: *1. A module that uses this pin is selected by IPSELR in PFC.
*2. A module that uses this pin is selected by MODSELR in PFC.
*3. GPIO interrupts are supported.
Register
Setting
AUD
AUD
AUD
AUD
AUD
AUD
Rev. 1.0, 02/03, page 843 of 1294
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