SH7760 Datasheet, PDF (573/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Section 16 Timer/Counter (CMT)
The unit has 2 major modes of operation. It can be configured as a four-channel timer/counter unit
that contains a 32 bit free running timer as a common time-stamp for four 32-bit capture/compare
registers.
Alternatively it can be configured as four 16-bit timer/counters with count enables. In this mode
there are four independent 16-bit incrementing/decrementing blocks. Each channel can then be set
up to output a signal when the compare time is reached or to store the timer value when an input
edge is received. This latter case also supports up/down counting on some channels.
16.1 Features
• 32-bit free-running timer
• Four channels of output compare or input capture
• 4-channel 16-bit timer/counter
• Interrupt on capture, compare, and overflow
• Programmable pin/edge polarity
• Programmable timer clock
• Independent clocks for 16-bit timers
• Rotary switches supported
Figure 16.1 shows a block diagram of the CMT.
IRQ
CPU
Timer/
Counter
CMT_CTR0
CMT_CTR1
CMT_CTR2
CMT_CTR3
Figure 16.1 Block Diagram of CMT
Rev. 1.0, 02/03, page 523 of 1294