SH7760 Datasheet, PDF (891/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Section 24 Pin Function Controller (PFC)
24.1 Features
The PFC has the following features.
• Individual control of pull-up of each port pin used by a peripheral module
• Individual control of high-impedance (Hi-Z) state of pins used by the SCIF in software
standby mode
• Applicable modules are selectable by the MFI mode/LCD mode
This LSI has ten general ports (A to H, J, and K), which provide 69 input/output pins and one
output pin in total.
The GPIO (general port for input/output) has the following features.
• Each port pin is multiplexed pin, for which the port control register can set the pin function
and pull-up MOS control individually.
• Each port has a data register that stores data for the pins.
• GPIO interrupts are supported.
For details of multiplexed pins, refer to table 24.1, Multiplexed Pins Controlled by Port Control
Registers. For pin multiplexing in this LSI, refer to table 1.2 and 1.3. By default, each pin of the
ports is pulled up. When peripheral modules are used, it is necessary to turn off the pull-up of the
pins to be used.
Table 24.1 Multiplexed Pins Controlled by Port Control Registers
Pin Name
Port
CAN0_NERR/AUDCK*¹
A
CAN0_RX/AUDATA[2]*¹
A
CAN0_TX/AUDATA[0]*¹
A
CAN1_NERR/AUDSYNC*¹
A
CAN1_RX/AUDATA[3]*¹
A
CAN1_TX/AUDATA[1]*¹
A
SSI0_SCK/HAC_SD_IN0/BS2*¹*² B
SSI0_WS/HAC_SYNC0*¹
B
SSI0_SDATA/HAC_SD_OUT0*¹ B
GPIO
PTA7 input/output
PTA6 input/output
PTA5 input/output
PTA4 input/output
PTA3 input/output
PTA2 input/output
PTB7 input/output
PTB6 input/output
PTB5 input/output
MFI Mode
(MD7=0)
LCD Mode
(MD7 = 1)
HCAN2[0]/AUD
HCAN2[0]/AUD
HCAN2[0]/AUD
HCAN2[1]/AUD
HCAN2[1]/AUD
HCAN2[1]/AUD
SSI[0]/HAC[0]
SSI[0]/HAC[0]
SSI[0]/HAC[0]
Register
Setting
AUD
AUD
AUD
AUD
AUD
AUD
BS2
Rev. 1.0, 02/03, page 841 of 1294