SH7760 Datasheet, PDF (37/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Figure 21.3 USB Read Operation ...............................................................................................755
Figure 21.4 Example of Transfer Failure....................................................................................755
Figure 21.5 Example of RHSC interrupt handling......................................................................756
Section 22 Hitachi Controller Area Network 2 (HCAN2)
Figure 22.1 Block Diagram of HCAN2 Module.........................................................................758
Figure 22.2 HCAN2 Memory Map.............................................................................................761
Figure 22.3 Mailbox N Structure ................................................................................................764
Figure 22.4 Acceptance Filter.....................................................................................................769
Figure 22.5 Reset Sequence........................................................................................................813
Figure 22.6 Transmission Request..............................................................................................814
Figure 22.7 Internal Arbitration for Transmission......................................................................815
Figure 22.8 Message Receive Sequence .....................................................................................817
Figure 22.9 Changing ID of Receive Box or Changing Receive Box to Transmit Box .............820
Section 23 Hitachi Serial Protocol Interface (HSPI)
Figure 23.1 Block Diagram of HSPI...........................................................................................824
Figure 23.2 Operational Flowchart .............................................................................................836
Figure 23.3 Timing Conditions when FBS = 0...........................................................................838
Figure 23.4 Timing Conditions when FBS = 1...........................................................................839
Section 25 Hitachi Audio Codec Interface (HAC)
Figure 25.1 Block Diagram ........................................................................................................882
Figure 25.2 AC97 Frame Slot Structure .....................................................................................898
Figure 25.3 Initialization Sequence ............................................................................................902
Figure 25.4 Sample Flowchart for Off-Chip Codec Register Write ...........................................903
Figure 25.5 Sample Flowchart for Off-Chip Codec Register Read ............................................904
Figure 25.6 Sample Flowchart for Off-Chip Codec Register Read (cont)..................................905
Figure 25.7 Sample Flowchart for Off-Chip Codec Register Read (cont)..................................906
Section 26 Multimedia Card Interface (MMCIF)
Figure 26.1 Block Diagram of MMCIF ......................................................................................910
Figure 26.2 DR Access Example ................................................................................................939
Figure 26.3 Example of Command Sequence for Commands Not Requiring Command
Response .................................................................................................................. 943
Figure 26.4 Example of Operational Flow for Commands Not Requiring Command
Response .................................................................................................................. 944
Figure 26.5 Example of Command Sequence for Commands without Data Transfer
(No Data Busy State)...............................................................................................945
Figure 26.6 Example of Command Sequence for Commands without Data Transfer
(with Data Busy State) ............................................................................................946
Figure 26.7 Example of Operational Flow for Commands without Data Transfer.....................947
Figure 26.8 Example of Command Sequence for Commands with Read Data
(Block Size ≤ FIFO Size) ........................................................................................949
Rev. 1.0, 02/03, page xxxv of xlviii