SH7760 Datasheet, PDF (880/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Bit
Bit Name Initial Value R/W Description
3
RXOW
0
R/W*
Receive Buffer Overrun Warning Flag
This status flag is set to 1 when a new serial data
transfer starts and the previous received data has
not been read from SPRBR. The RXOW remain set
to 1 until writing a 0 to its bit position.
If RXOW= 1 and ROIE = 1 then the interrupt is
generated.
2
RXFL
0
R
Receive Buffer Full Status Flag
This status flag indicates that new data is available
in the SPRBR and has not yet been read. It is set
to 1 at the completion of a serial bus transfer at the
point the shift register contents are loaded into the
SPRBR. This bit is cleared to 0 by reading SPRBR.
If RXFL = 1 and RXDE = 1 then the DMA transfer
request enabled.
1
TXFN
0
R
Transmit Complete Status Flag
This status flag indicates that the last transmission
has completed. It is set to 1 when SPTBR is able to
write more data from the peripheral bus. This bit is
cleared to 0 by writing more data SPTBR.
If TXFN = 1 and TFIE = 1 then the interrupt is
generated.
0
TXFL
0
R
Transmit Buffer Full Status Flag
This status flag indicates SPTBR has transmitted
data. It is set to 1 when SPTBR is written with data
from the peripheral bus. This bit is cleared to 0
when SPTBR is able to accept more data from the
peripheral bus.
If TXFL = 0 (i.e. the SPTBR is empty) and TXDE =
1 then the DMA transfer request enabled.
Note:* These bits are readable/writable bits. When writing 0, these bits are initialized, while writing
1 is ignored.
Rev. 1.0, 02/03, page 830 of 1294