SH7760 Datasheet, PDF (1253/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Internal clock
VDD
RESET
MD8, MD7,
MD2-MD0
TRST
Stable oscillation
V_DD min
t_OSC1
t_RESW
t_OSCMD
t_MDRH
t_TRSTRH
CKIO
Notes: 1. Oscillation settling time when on-chip resonator is used.
2. PLL2 operating
Figure 33.8 Power-On Oscillation Settling Time (2)
During Standby
Internal clock
RESET
or MRESET
CKIO
t_OSC2
Stable oscillation
t_RESW
Notes: 1. Oscillation settling time when on-chip resonator is used.
2. PLL2 operating
Figure 33.9 Standby Return Oscillation Settling Time (Return by RESET or MRESET) (2)
Rev. 1.0, 02/03, page 1203 of 1294