SH7760 Datasheet, PDF(863/1345 Page) Renesas Technology Corp – SuperHTM RISC engine

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SH7760 Datasheet, PDF (863/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

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22.6.2 HCAN2 Settings

â¢ Reset Sequence

Following sequence is an example to configure the HCAN2 after Hardware/Software Reset.

After reset, all the registers are initialized, therefore, the HCAN2 needs to be configured before

joining the CAN bus activity. Read the notes carefully.

Reset sequence

Configuration mode

Power on/software reset*1

Clear MCR0

Clear all Mailboxes*2

(MSG control,data,

time stamp,LAFM)

GSR3 = 0?

Yes

This takes

23 clocks

No

Set CANBCR[1, 0]*3

Clear IRR0

Clear required CANIMR

Set LAFM

Set CANTCR and CANTCMR

HCAN2 is in normal mode

Set CANTXPR to start

transmission or stay idle

for reception

Normal mode

Detect 11 recessive bits and

join the CAN bus activity

Mailbox settings

(STD-ID, EXT-ID, DLC, RTR,

IDE, MBC, MBIMR, DART,

ATX, NMC, LAFM)

Receive*3 Transmit*3 Timer start*4

Notes: *1 Software reset could be performed at any time by setting MCR0=1.

*2 Mailboxes are comprised of RAMs. Therefore, initialize all the mailboxes first

even if some of them are not used.

*3 If CANTXPR is not set, HCAN2 will receive the next incoming message. If

CANTXPR is set, HCAN2 will start transmission of the message and will be

arbitrated by the CAN bus. If it loses the arbitration, it will become a receiver.

*4 Timer can be started at any time after CANTCR is set.

Figure 22.5 Reset Sequence

Rev. 1.0, 02/03, page 813 of 1294

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