SH7760 Datasheet, PDF (91/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Section 3 Floating-Point Unit (FPU)
3.1 Features
The FPU has the following features.
• Conforms to IEEE754 standard
• 32 single-precision floating-point registers (can also be referenced as 16 double-precision
registers)
• Two rounding modes: Round to Nearest and Round to Zero
• Two denormalization modes: Flush to Zero and Treat Denormalized Number
• Six exception sources: FPU Error, Invalid Operation, Divide By Zero, Overflow, Underflow,
and Inexact
• Comprehensive instructions: Single-precision, double-precision, graphics support, and system
control
When the FD bit in SR is set to 1, the FPU cannot be used, and an attempt to execute an FPU
instruction will cause an FPU disable exception.
3.2 Data Formats
3.2.1 Floating-Point Format
A floating-point number consists of the following three fields:
• Sign (s)
• Exponent (e)
• Fraction (f)
This LSI can handle single-precision and double-precision floating-point numbers, using the
formats shown in figures 3.1 and 3.2.
31 30
23 22
0
s
e
f
Figure 3.1 Format of Single-Precision Floating-Point Number
Rev. 1.0, 02/03, page 41 of 1294