SH7760 Datasheet, PDF (25/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

29.7.4 Notes on Standby Modes ................................................................................... 1033
Section 30 LCD Controller (LCDC).............................................................. 1035
30.1 Features ........................................................................................................................... 1035
30.2 Input/Output Pins ............................................................................................................ 1036
30.3 Register Configuration .................................................................................................... 1037
30.3.1 LCDC Input Clock Register (LDICKR) ............................................................ 1039
30.3.2 LCDC Module Type Register (LDMTR)........................................................... 1040
30.3.3 LCDC Data Format Register (LDDFR) ............................................................. 1043
30.3.4 LCDC Scan Mode Register (LDSMR) .............................................................. 1045
30.3.5 LCDC Display Start Address Register - Upper (LDSARU) .............................. 1046
30.3.6 LCDC Display Start Address Register – Lower (LDSARL) ............................. 1047
30.3.7 LCDC Display Line Address Offset Register (LDLAOR) ................................ 1048
30.3.8 LCDC Palette Control Register (LDPALCR) .................................................... 1049
30.3.9 Palette Data Registers 00 to FF (LDPR00 to LDPRFF) .................................... 1050
30.3.10 LCDC Horizontal Character Number Register (LDHCNR) .............................. 1051
30.3.11 LCDC Horizontal Sync Signal Register (LDHSYNR) ...................................... 1051
30.3.12 LCDC Vertical Display Line Number Register (LDVDLNR)........................... 1053
30.3.13 LCDC Vertical Total Line Number Register (LDVTLNR) ............................... 1054
30.3.14 LCDC Vertical Sync Signal Register (LDVSYNR) .......................................... 1055
30.3.15 LCDC AC Modulation Signal Toggle Line Number Register (LDACLNR)..... 1056
30.3.16 LCDC Interrupt Control Register (LDINTR) .................................................... 1056
30.3.17 LCDC Power Management Mode Register (LDPMMR)................................... 1058
30.3.18 LCDC Power-Supply Sequence Period Register (LDPSPR) ............................. 1060
30.3.19 LCDC Control Register (LDCNTR) .................................................................. 1061
30.4 Operation......................................................................................................................... 1063
30.4.1 Size of LCD Modules Which Can Be Displayed with this LCDC..................... 1063
30.4.2 Limits on the Resolution of Rotated Displays ................................................... 1064
30.4.3 Color Palette Specification................................................................................. 1064
30.4.4 Data Format ....................................................................................................... 1066
30.4.5 Setting the Display Resolution........................................................................... 1069
30.4.6 Power Supply Control Sequence Processing ..................................................... 1069
30.4.7 Operation for Hardware Rotation....................................................................... 1074
30.5 Clock and LCD Data Signal Examples ........................................................................... 1077
Section 31 User Break Controller (UBC) ...................................................... 1089
31.1 Features ........................................................................................................................... 1089
31.2 Register Descriptions ...................................................................................................... 1091
31.2.1 Break Address Register A, B (BARA, BARB).................................................. 1093
31.2.2 Break ASID Register A, B (BASRA, BASRB) ................................................. 1094
31.2.3 Break Address Mask Register A (BAMRA)...................................................... 1095
31.2.4 Break Address Mask Register B (BAMRB) ...................................................... 1096
Rev. 1.0, 02/03, page xxiii of xlviii