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| SH7760 Datasheet, PDF (66/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine | |||
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Pin No. Pin Name
I/O
Function
GPIO
K3
VDDQ

IO VDD
K4
VSSQ

IO GND
K17
AVss_ADC

ADC analog GND
K18
AVcc_ADC
K19
ADTRG/AUDATA[0]

ADC analog VCC
I/O
A/D external trigger/H-UDI emulator
Î
K20
Reserved/AUDATA[1]
O
Reserved/H-UDI emulator
Î
L1
MFI-D13/LCD_DATA13
IO/O
MFI data/LCDC panel data
Î
L2
MFI-D5/LCD_DATA5/DRAK2/DACK2 IO/O/O/O MFI data/LCDC panel data/DMAC2 request
Î
acknowledgement/DMAC2 bus acknowledgement
L3
CS4

Chip select 4
L4
A20
O
Address bus
L17
AN3
I
ADC analog input
L18
AN2
I
ADC analog input
L19
AN1
I
ADC analog input
L20
AN0
I
ADC analog input
M1
MFI-D14/LCD_DATA14
M2
MFI-D6/LCD_DATA6/DREQ3
IO/O
MFI data/LCDC panel data
Î
IO/O/I MFI data/LCDC panel data/DMAC3 request
Î
M3
VDDQ

IO VDD
M4
VSSQ

IO GND
M17
VSSQ

IO GND
M18
VDDQ

IO VDD
M19
IRL3
I
IRL interrupt request 3
M20
IRL2
I
IRL interrupt request 2
N1
MFI-D15/LCD_DATA15
IO/O
MFI data/LCDC panel data
Î
N2
MFI-D7/LCD_DATA7/DRAK3/DACK3 IO/O/O/O MFI data/LCDC panel data/DMAC3 request
Î
acknowledgement/DMAC3 bus acknowledgement
N3
CS5
O
Chip select 5
N4
A21
O
Address bus
N17
VSSQ

IO GND
N18
VDDQ

IO VDD
N19
IRL1
I
IRL interrupt request 1
N20
IRL0
I
IRL interrupt request 0
P1
MFI-INT/LCD_CLK
P2
MFI-CS/LCD_DON
O/I
MFI interrupt/LCDC clock
Î *1
I/O
MFI chip selection/LCDC display-on signal
Î *1
Rev. 1.0, 02/03, page 16 of 1294
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