SH7760 Datasheet, PDF (1019/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Section 27 Multifunctional Interface (MFI)
This LSI incorporates a multifunctional interface (MFI) for use in high-speed transfer of data to
external devices which cannot share an external bus. The MFI is a parallel interface with
selectable 8-bit/16-bit bus width, and can be directly connected to 68/80-series system interfaces.
The MFI allows external devices to read from and write to 2-kbyte on-chip RAM exclusively for
MFI use (MFRAM), in 32-bit units. Access to this MFRAM is available via the MFI and the CPU
of this LSI. The MFI supports interrupts issued to this LSI by an external device, and those sent
from this LSI to the external device. Using the MFRAM and these interrupt functions enables
software-based data transfer between external devices and the on-chip CPU and connection to
external devices not having bus privileges.
27.1 Features
• Provides reading from/writing to the 2-kbyte on-chip MFRAM in 32-bit units via MFI pins,
and in 8-, 16-, or 32-bit units from the on-chip CPU.
• Supports a high-speed asynchronous interface with selectable 8-bit/16-bit bus width; allows
selection of 68- or 80-series during reset period.
• Automatic address increments and endian settings are configurable.
• Writing to specific bits of MFI on-chip registers from an external device will issue interrupts
to this LSI. Conversely, this LSI is able to send interrupts from the on-chip CPU to the
external device.
• Provides 7 interrupt source bits each for internal interrupts and for external interrupts. It allows
software-based control of 128 different interrupts with high-speed data transfer using
interrupts.
Rev. 1.0, 02/03, page 969 of 1294