SH7760 Datasheet, PDF (24/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

27.4.3 Memory Map ....................................................................................................... 985
27.5 Interface (Basic)................................................................................................................ 986
27.5.1 68-Series 8-Bit Parallel Interface......................................................................... 986
27.5.2 80-Series 8-Bit Parallel Interface......................................................................... 987
27.6 Interface (Details) ............................................................................................................. 988
27.6.1 Writing to MFIIDX/Reading from MFIGSR....................................................... 988
27.6.2 Reading from/Writing to MFI Register ............................................................... 988
27.6.3 Continuous Data Writing to MFRAM via MFI ................................................... 989
27.6.4 Continuous Reading from MFRAM via MFI ...................................................... 989
Section 28 Hitachi User Debug Interface (H-UDI) ...........................................991
28.1 Input/Output Pins .............................................................................................................. 993
28.2 Boundary Scan TAP Controllers (EXTEST, SAMPLE/PRELOAD, and BYPASS)........ 995
28.2.1 Boundary Scan Register (SDBSR) ...................................................................... 996
28.3 Register Descriptions ...................................................................................................... 1005
28.3.1 Instruction Register (SDIR) ............................................................................... 1007
28.3.2 Data Register H and L (SDDRH, SDDRL) ....................................................... 1007
28.3.3 Interrupt Source Register (SDINT).................................................................... 1008
28.4 Operation ........................................................................................................................ 1009
28.4.1 TAP Control....................................................................................................... 1009
28.4.2 H-UDI Reset ...................................................................................................... 1010
28.4.3 H-UDI Interrupt ................................................................................................. 1010
28.5 Usage Notes .................................................................................................................... 1011
Section 29 A/D Converter (ADC) ..................................................................1013
29.1 Features........................................................................................................................... 1013
29.2 Input/Output Pins ............................................................................................................ 1015
29.3 Register Descriptions ...................................................................................................... 1016
29.3.1 A/D Conversion Data Registers A to D (ADDRA to ADDRD) ........................ 1017
29.3.2 A/D Control/Status Register (ADCSR) ............................................................. 1018
29.4 Operation ........................................................................................................................ 1021
29.4.1 Single Mode....................................................................................................... 1021
29.4.2 Multi Mode ........................................................................................................ 1023
29.4.3 Scan Mode ......................................................................................................... 1025
29.4.4 A/D Conversion Time........................................................................................ 1028
29.4.5 External Trigger Input Timing........................................................................... 1029
29.5 Interrupts......................................................................................................................... 1030
29.6 Definitions of A/D Conversion Accuracy....................................................................... 1030
29.7 Usage Notes .................................................................................................................... 1031
29.7.1 Setting Analog Input Voltage ............................................................................ 1031
29.7.2 Processing of Analog Input Pins........................................................................ 1032
29.7.3 Pck and Clock Division Ratio Settings .............................................................. 1033
Rev. 1.0, 02/03, page xxii of xlviii