SH7760 Datasheet, PDF (920/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Bit Bit Name
7
PE7PUPR
6
PE6PUPR
5
PE5PUPR
4
PE4PUPR
3
PE3PUPR
2
PE2PUPR
1
PE1PUPR
0
PE0PUPR
n = 7 to 0
Initial Value
1
1
1
1
1
1
1
1
R/W Description
R/W Sets individual pull-up control for each pin of Port E
R/W _{0: PTEn pull-up off}
R/W _{1: PTEn pull-up on}
R/W
R/W
R/W
R/W
R/W
24.2.27 Port F Pull-Up Control Register (PFPUPR)
PFPUPR is an 8-bit readable/writable register that individually controls the pull-up for pins PTF3
to PTF0 corresponding to each bit in the register when the given pin is used by a peripheral
module. However, for the pins set to the GPIO in the PFCR, the settings in this register will be
invalid.
Bit: 7
6
5
4
3
2
1
0
-
-
-
- ^{PF3 PF2 PF1 PF0}
PUPR PUPR PUPR PUPR
Initial value: 0
0
0
0
1
1
1
1
R/W: R R
R
R R/W R/W R/W R/W
Bit Bit Name
7 to 4 —
Initial Value R/W
All 0
R
3
PF3PUPR 1
R/W
2
PF2PUPR 1
R/W
1
PF1PUPR 1
R/W
0
PF0PUPR 1
R/W
n = 3 to 0
Description
Reserved
These bits are always read as 0, and the write value
should always be 0.
Sets individual pull-up control of each pin of Port F
0: PTFn pull-up off
1: PTFn pull-up on
Rev. 1.0, 02/03, page 870 of 1294