SH7760 Datasheet, PDF (726/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

MAT flag
MDE flag
MDT flag
Hardware
S SLAVE ADDRESS
A
DATA1
AP
Write data1
Set FSB
[Legend]
S: Start condition
P: Stop condition
A: Acknowledge
(1)
(3)
(2)
Clear MAT and MDE
I²C bus
Software
Figure 19.11 Operational Example of One-byte Data Transmission
(2) Two-byte data transmission
Figure 19.12 shows an operational example of two-byte data transmission.
Write data 1 before clearing the MAT and MDE flags to 0 in (2) (for example, in initial setting
preceding the issue of start conditions.). Once the MDE flag is cleared, data transmission starts.
[Restriction] Write data 2 within eight SCL clock cycles after clearing the MAT and MDE
flags in (2).
Otherwise, data 1 is transmitted twice. If it is impossible to write data 2 within eight SCL clock
cycles due to long interrupt processing time, use FIFO buffer mode. Set the FSB flag to 1 at the
timing between (4) and (5) (for example, when the MDE flag is set to 1).
Rev. 1.0, 02/03, page 676 of 1294