SH7760 Datasheet, PDF (1301/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

33.3.13 HSPI Module Signal Timing
Table 33.20 HSPI Module Signal Timing
Item
HSPI_CLK frequency
HSPI clock high level width
HSPI clock low level width
HSPI_TX setup time
HSPI_TX delay time
HSPI_RX setup time
HSPI_RX hold time
HSPI_CS read time
Note: Pck : Peripheral clock frequency
Symbol
t_SPIcyc
t_SPIHW
t
SPILW
t
SUSPITX
t
DSPITX
t_SUSPIRX
t_HLSPIRX
t_CSLEAD
Min.
—
60
60
—
—
20
20
100
Max. Unit
Pck/8 Hz
—
ns
—
ns
20
ns
20
ns
—
ns
—
ns
—
ns
Figure
33.64
33.64
33.64
33.64
33.64
33.64
33.64
33.64
HSPI_CS
(CLKP= 0)
HSPI_CLK
t_SPIcyc
t_SPILW
t_SPIHW
(CLKP= 1)
HSPI_CLK
(LMSB= 0)
HSPI_TX
HSPI_RX
(LMSB= 1)
HSPI_TX
HSPI_RX
t_CSLEAD
t_SUSPITX
MSB
t_DSPITX
MSB-1
t_SUSPIRX t_HLSPIRX
MSB
MSB-1
MSB-2
t_SUSPITX
MSB
t_DSPITX
MSB-1
t_SUSPIRX t_HLSPIRX
MSB
MSB-1
Figure 33.64 HSPI Data Output/Input Timing
Rev. 1.0, 02/03, page 1251 of 1294